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PEDL66573-02
1 Semiconductor MSM66573 Family
16-Bit Microcontroller
This version: Aug. 1999 Previous version: Jun.1999
Preliminary
GENERAL DESCRIPTION
The MSM66573 family of highly functional CMOS 16-bit single chip microcontrollers utilize the nX-8/500S, Oki's proprietary CPU core. A wide variety of internal multi-functioned timers provide timer functions such as compare out, capture, event counter, auto reload, and PWM, and can be used for periodic and timed measurements. In addition to the main clock and clock gear functions, there is a sub clock (32.768 kHz) that is suitable for low power applications. A three channel serial interface and a high-speed bus interface that has separate address and data buses and does not require external address latches are provided as interfaces to external devices. With a 16-bit CPU core that enables high-speed 16-bit arithmetic computations and a variety of bit processing functions, this general-purpose microcontroller is optimally suited for Digital Audio devices such as a Mini-Disc and an MP3 player. The flash ROM version (MSM66Q573L) programmable with a single 2.4 V (minimum) power supply and flash ROM version (MSM66Q573) programmable with a single 5 V power supply are also included in the family. These versions are easily adaptable to sudden specification changes and to new product versions.
APPLICATIONS
Digital Audio Control Systems PC peripheral Control Systems Office Electronics Control Systems
ORDERING INFORMATION
Order Code or Product Name MSM66573L-TB MSM66573-TB MSM66Q573L-TB MSM66Q573-TB MSM66P573-TB 100-pin plastic TQFP (TQFP 100-P-1414-0.50-K) Package Remark Low voltage version (2.4 to 3.6 V) 5V mask ROM version (4.5 to 5.5 V) MSM66573L flash ROM version MSM66573 flash ROM version MSM66573 OTP ROM version (2.7 to 5.5 V)
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FEATURES
Name Operating temperature Power supply voltage/ maximum frequency Minimum instruction execution time Internal ROM size (max. external) Internal RAM size (max. external) I/Oports MSM66573L -30C to +70C VDD=2.4 to 3.6 V/f=14 MHz VDD=4.5 to 5.5 V/f=30 MHz MSM66573
Timers
143 ns at 14 MHz (2.4 to 3.6 V) 67ns at 30 MHz (4.5 to 5.5 V) 61s at 32.768 kHz (2.4 to 3.6/4.5 to 5.5 V) 64 KB (1 MB) 4 KB (1 MB) 75 I/O pins (with programmable pull-up resistors) 8 input-only pins 16-bit free running timer x 1ch Compare out/capture input x 2ch 16-bit timer (auto reload/timer out) x 1ch 8-bit auto reload timer x 1ch 8-bit auto reload timer x 3ch (also fumctions as serial communication baud rate generator) Watchdog timer (also functions as 8-bit auto reload timer) Watch timer (real-time counter) x 1ch 8-bit PWM x 4ch (can also be used as 16-bit PWM x 2ch) UART x 1ch Synchronous x 1ch UART/ Synchronous x 1ch 10-bit A/D converter, 8-ch multiplexer x 1ch Non-maskable x 1ch Maskable x 6ch 3 levels Separate address and data busses Bus release function Dual clocks MSM66P573 (Max. f = 24 MHz) MSM66Q573L MSM66Q573
Serial port A/D converter External interrupt Interrrupt priority Others OTP ROM version Flash ROM version
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SPECIAL FEATURES
1. High-performance CPU The family includes the high-performance CPU, powerful bit manipulation instruction set, full symmetrical addressing mode, and ROM WINDOW function, and also provides the best optimized C compiler support. 2. A variety of power saving modes Attaching a 32.768-kHz crystal produces a real-time clock signal from the internal clock timer. Use of a single clock in place of dual clocks is possible. Switching the CPU clock to this clock signal, 1/2 x main clock, or 1/4 x main clock, then produces operation in a low power consumption mode. The clock gear function allows a 1/2 x or 1/4 x main clock to be selected for the CPU operating clock. The family provides a wide range of standby control functions. In addition to the usual STOP mode that stops the oscillator, there are the quick restart STOP mode that shuts down the CPU and peripherals but leaves the oscillator running, and the HALT mode that shuts down the CPU but leaves the peripherals running. 3. MSM66Q573L and MSM66Q573 with flash memory programmable with single power supply In addition to the regular mask ROM version, the family includes these versions with 64KB of flash memory that can be programmed using a single power supply. For the MSM66Q573L, an internal booster circuit derives the necessary program voltage from the device's low (2.4 V min) power supply, and the program voltage for the MSM66Q573 is provided with a single 5 V power supply. 4. Multifunction, high-precision analog-to-digital converter The family includes a high-precision 10-bit analog-to-digital converter with eight channels and is ideal for such analog control functions as processing audio signals, processing sensor inputs, detecting key switch states, and controlling battery use in portable equipment. Each channel has its own result register readily accessible from the software. In addition to single-channel conversions, there is also a scan function offering automatic conversion from the user's choice of starting channel through to the last channel. 5. Multifunction PWM The family supports both 8- and 16-bit PWM operation. Choosing between the time-base counter output or overflow from an 8-bit auto-reload timer as the PWM counter clock source provides a wide number of possibilities over a broad frequency range. The 16-bit PWM configuration supports a high-speed synchronization mode that generates a high-precision output signal with less ripple suitable for digital-to-analog control applications. 6. Programmable pull-up resistors Building the pull-up resistors into the chip contributes to overall design compactness. Making them programmable on a per-bit basis allows complete flexibility in circuit board layout and system design. These programmable pull-up resistors are available for all I/O pins not already assigned specific functions (such as the oscillator connection pins). 7. High-speed bus interface The interface to external devices uses separate data and address buses. This arrangement permits rapid bus access for controlling the system from the microcontroller. 8. Wide support for external interrupts There are a total of seven interrupt channels for use in communicating with external devices: six for maskable interrupts and one for non-maskable interrupts.
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BLOCK DIAGRAM
TM0OUT TM0EVT CLKOUT XTOUT RXD0 TXD0 RXC0 TM3OUT TM3EVT RXD1 TXD1 RXC1 TXC1 TM4OUT SIOI3 SIOO3 SIOCK3 TM5EVT 16 bit Timer0 Peripheral SIO0 (UART) System Control ALU Control Registers 8 bit Timer3/BRG
ALU Control ACC
CPU Core
XT0 XT1 OSC0 OSC1 HOLD HLDACK RES
SSP LRB
PSW PC
SIO1 (UART/SYNC)
DSR TSR CSR
8 bit Time4/BRG
Memory Control Pointing Registers Local Registers
SIO3 (SYNC)
Instruction Decoder
8 bit Timer5/BRG RAM 4K 8 bit Timer6/WDT ROM 64K Bus Port Control
PWMOUT0 PWMOUT2 PWMOUT1 PWMOUT3 TM9OUT TM9EVT CPCM0 CPCM1
EA PSEN RD WR WAIT D0 to D7 A0 to A19 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12
8 bit PWM0 8 bit PWM1
8 bit Timer9 CAP/CMP 16 bit FRC TBC
VREF AGND AI0 to AI7 NMI EXINT0 to EXINT5
RTC 10 bit A/D Converter
Interrupt
Port Control
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PIN CONFIGURATION (TOP VIEW)
P10-3 SIOO3/P10-2 SIOI3/P10-1 SIOCK3/P10-0 TM3EVT/P7-5 TM3OUT/P7-4 RXC0/P7-2 GND TXD0/P7-1 RXD0/P7-0 AGND AI7/P12-7 AI6/P12-6 AI5/P12-5 AI4/P12-4 AI3/P12-3 AI2/P12-2 AI1/P12-1 AI0/P12-0 VREF VDD A19/P2-3 A18/P2-2 A17/P2-1 A16/P2-0 95 90 85
P10-4 P10-5 TM5EVT/P10-7 RXD1/P8-0 TXD1/P8-1 RXC1/P8-2 TXC1/P8-3 TM4OUT/P8-4 PWM2OUT/P8-6 PWM3OUT/P8-7 PWM0OUT/P7-6 PWM1OUT/P7-7 VDD GND HLDACK/P9-7 EXINT4/P9-0 EXINT5/P9-1 P9-2 P9-3 EXINT0/P6-0 EXINT1/P6-1 EXINT2/P6-2 EXINT3/P6-3 P6-4 P6-5
100
80
1
75
5 70
10 65
15 60
20 55
25
P1-7/A15 P1-6/A14 P1-5/A13 P1-4/A12 P1-3/A11 P1-2/A10 P1-1/A9 P1-0/A8 P4-7/A7 P4-6/A6 P4-5/A5 P4-4/A4 P4-3/A3 P4-2/A2 P4-1/A1 P4-0/A0 GND P0-7/D7 P0-6/D6 P0-5/D5 P0-4/D4 P0-3/D3 P0-2/D2 P0-1/D1 P0-0/D0
30
35
40
45
P6-6 P6-7 P5-4/CPCM0 P5-5/CPCM1 P5-6/TM0OUT P5-7/TM0EVT RES NMI EA VDD XT0 XT1 GND OSC0 OSC1 VDD P11-0/WAIT P11-1/HOLD P11-2/CLKOUT P11-3/XTOUT P11-6/TM9OUT P11-7/TM9EVT P3-1/PSEN P3-2/RD P3-3/WR
100-pin Plastic TQFP
50
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PIN CONFIGURATION (TOP VIEW) (continued)
SIOCK3/P10-0 TM3EVT/P7-5 TM3OUT/P7-4 RXC0/P7-2 GND TXD0/P7-1 RXD0/P7-0 AGND AI7/P12-7 AI6/P12-6 AI5/P12-5 AI4/P12-4 AI3/P12-3 AI2/P12-2 AI1/P12-1 AI0/P12-0 VREF VDD A19/P2-3 A18/P2-2 95 90 100 85
SIOI3/P10-1 SIOO3/P10-2 P10-3 P10-4 P10-5 TM5EVT/P10-7 RXD1/P8-0 TXD1/P8-1 RXC1/P8-2 TXC1/P8-3 TM4OUT/P8-4 PWM2OUT/P8-6 PWM3OUT/P8-7 PWM0OUT/P7-6 PWM1OUT/P7-7 VDD GND HLDACK/P9-7 EXINT4/P9-0 EXINT5/P9-1 P9-2 P9-3 EXINT0/P6-0 EXINT1/P6-1 EXINT2/P6-2 EXINT3/P6-3 P6-4 P6-5 P6-6 P6-7
1
80
5 75
10 70
15 65
20 60
25 55
30
35 40 45 50
P2-1/A17 P2-0/A16 P1-7/A15 P1-6/A14 P1-5/A13 P1-4/A12 P1-3/A11 P1-2/A10 P1-1/A9 P1-0/A8 P4-7/A7 P4-6/A6 P4-5/A5 P4-4/A4 P4-3/A3 P4-2/A2 P4-1/A1 P4-0/A0 GND P0-7/D7 P0-6/D6 P0-5/D5 P0-4/D4 P0-3/D3 P0-2/D2 P0-1/D1 P0-0/D0 P3-3/WR P3-2/RD P3-1/PSEN
P5-4/CPCM0 P5-5/CPCM1 P5-6/TM0OUT P5-7/TM0EVT RES NMI EA VDD XT0 XT1 GND OSC0 OSC1 VDD P11-0/WAIT P11-1/HOLD P11-2/CLKOUT P11-3/XTOUT P11-6/TM9OUT P11-7/TM9EVT
100-pin Plastic QFP
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PIN DESCRIPTIONS
In the Type column, "I" indicates an input pin, "O" indicates an output pin, and "I/O" indicates an I/O pin.
Classification Port
Symbol P0_0/D0 to P0_7/D7 P1_0/A8 to P1_7/A15 P2_0/A16 to P2_3/A19 P3_1/PSEN P3_2/RD P3_3/WR P4_0/A0 to P4_7/A7 P5_4/CPCM0 P5_5/CPCM1
P5_6/TM0OUT P5_7/TM0EVT
Type I/O
Primary function
8-bit I/O port 10 mA sink capability Pull-up resistors can be specified for each individual bit 8-bit I/O port Pull-up resistors can be specified for each individual bit 4-bit I/O port Pull-up resistors can be specified for each individual bit 3-bit I/O port 10 mA sink capability Pull-up resistors can be specified for each individual bit
Function Type I/O
Secondary function
External memory access Data I/O port
I/O I/O I/O
O O O O O
External memory access Address output port External memory access Address output port External program memory access Read strobe output pin External memory access Read strobe output pin External memory access Write strobe output pin External memory access Address output port Capture 0 input / Compare 0 output pin Capture 1 input / Compare 1 output pin Timer 0 timer output pin Timer 0 external event input pin External interrupt 0 input pin External interrupt 1 input pin External interrupt 2 input pin External interrupt 3 input pin None
I/O I/O
8-bit I/O port Pull-up resistors can be specified for each individual bit 4-bit I/O port Pull-up resistors can be specified for each individual bit
O I/O I/O O I
P6_0/EXINT0 P6_1/EXINT1 P6_2/EXINT2 P6_3/EXINT3 P6_4 to P6_7
I/O
8-bit I/O port Pull-up resistors can be specified for each individual bit
I I I I --
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Classification Port
Symbol P7_0/RXD0 P7_1/TXD0 P7_2/RXC0 P7_4/TM3OUT P7_5/TM3EVT
P7_6/PWM0OUT P7_7/PWM1OUT
Type I/O
Primary function
7-bit I/O port Pull-up resistors can be specified for each individual bit
Function Type I O I O I O O
Secondary function
SIO0 receive data input pin SIO0 transmit data output pin SIO0 external clock input pin Timer 3 timer output pin Timer 3 external event input pin PWM0 output pin PWM1 output pin SIO1 receive data input pin SIO1 transmit data output pin SIO1 receive clock I/O pin SIO1 transmit clock I/O pin Timer 4 timer output pin PWM2 output pin PWM3 output pin External Interrupt 4 input pin External Interrupt 5 input pin None HOLD mode output pin
SIO3 transmit-receive clock I/O pin
P8_0/RXD1 P8_1/TXD1 P8_2/RXC1 P8_3/TXC1 P8_4/TM4OUT
P8_6/PWM2OUT P8_7/PWM3OUT
I/O
7-bit I/O port Pull-up resistors can be specified for each individual bit
I O I/O I/O O O O I I -- O
P9_0/EXINT4 P9_1/EXINT5 P9_2, P9_3 P9_7/HLDACK P10_0/SIOCK3 P10_1/SIOCI3 P10_2/SIOO3 P10_3 to P10_5 P10_7/TM5EVT P11_0/WAIT P11_1/HOLD P11_2/CLKOUT P11_3/XTOUT
P11_6/TM9OUT
I/O
5-bit I/O port Pull-up resistors can be specified for each individual bit
I/O
7-bit I/O port Pull-up resistors can be specified for each individual bit
I/O I O -- I
SIO3 receive data input pin SIO3 transmit data output pin None Timer 5 external event input pin External data memory access wait input pin HOLD mode request input pin Main clock pulse output pin Sub clock pulse output pin Timer 9 timer output pin Timer 9 external event input pin A/D converter analog input port
I/O
6-bit I/O port 10 mA sink capability Pull-up resistors can be specified for each individual bit
I I O O O I
P11_7/TM9EVT P12_0/AI0 to P12_7/AI7
I
8-bit input port
I
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Classification Power supply
Symbol VDD GND VREF AGND XT0 XT1 OSC0 OSC1
Type I I I I I O I O
Oscillation
Reset Other
RES NMI EA
I I I
Function Power supply pin Connect all VDD pins to the power supply. GND pin Connect all GND pins to GND. Analog reference voltage pin Analog GND pin Sub clock oscillation input pin Connect to a crystal oscillator of f = 32.768 kHz. Sub clock oscillation output pin Connect to a crystal oscillator of f = 32.768 kHz. The clock output is opposite in phase to XT0. Main clock oscillation input pin Connect to a crystal or ceramic oscillator. Or, input an external clock. Main clock oscillation output pin Connect to a crystal or ceramic oscillator. The clock output is opposite in phase to OSC0. Leave this pin unconnected when an external clock is used. Reset input pin Non-maskable interrupt input pin External program memory access input pin If the EA pin is enabled (low level), the internal program memory is masked and the CPU executes the program code in external program memory through all address space.
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ABSOLUTE MAXIMUM RATINGS
Parameter
Digital power supply voltage
Symbol VDD VI VO VREF VAI PD TSTG Ta=70C per package
Condition
Rated value -0.3 to +7.0 -0.3 to VDD+0.3 -0.3 to VDD+0.3 -0.3 to VDD+0.3 -0.3 to VREF
Unit V V V V V mW mW C
Input voltage Output voltage Analog reference voltage Analog input voltage Power dissipation Storage temperature
GND=AGND=0V Ta=25C
100-pin TQFP 100-pin QFP --
650 750 -50 to +150
RECOMMENDED OPERATING CONDITIONS
Parameter Symbol Condition MSM66573 fOSC30 MHz MSM66Q573 MSM66573L fOSC14 MHz MSM66Q573L MSM66P573 Analog reference voltage Analog input voltage Memory hold voltage VREF VAI VDDH -- -- fOSC=0Hz MSM66573 VDD=4.5 to 5.5 V MSM66Q573 MSM66573L VDD=2.4 to 3.6 V MSM66Q573L MSM66P573 Ambient temperature Fan out Ta N -- MOS load TTL load P0, P3, P11 P1, P2, P4, P5, P6, P7, P8, P9, P10 VDD=4.5 to 5.5 V VDD=2.7 to 3.6 V fOSC24 MHz fOSC12 MHz Rated value 4.5 to 5.5 2.4 to 3.6 4.5 to 5.5 2.7 to 3.6 VDD-0.3 to VDD AGND to VREF 2.0 to 5.5 2 to 30 2 to 14 2 to 24 2 to 12 -30 to +70 20 6 1 C -- -- -- MHz V V V V Unit
Dogital power supply voltage
VDD
Operating frequency
fOSC
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ALLOWABLE OUTPUT CURRENT VALUES
MSM66573L/Q573L (VDD=2.4 to 3.6 V, Ta=-30 to +70C) MSM66573/Q573 (VDD=4.5 to 5.5 V, Ta=-30 to +70C) MSM66P573 (VDD=2.7 to 3.6V/4.5 to 5.5 V, Ta=-30 to +70C) Parameter "H" output pin (1 pin) "H" output pins (sum total) "L" output pin (1 pin) Pin All output pins Sum total of all output pins P0, P3, P11 Other ports Sum total of P0, P3, P11 Sum total of P1, P2, P4 "L" output pins (sum total) Sum total of P5, P6, P9 Sum total of P7, P8, P10 Sum total of all output pins IOL -- -- 50 140 Symbol IOH IOH IOL Min. -- -- -- Typ. -- -- -- Max. -2 -40 10 5 80 mA Unit
[Note] Connect the power supply voltage to all VDD pins and the ground voltage to all GND pins.
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ELECTRICAL CHARACTERISTICS
DC Characteristics 1 (VDD=4.5 to 5.5 V)
MSM66573/Q573/P573 (VDD=4.5 to 5.5 V, Ta=-30 to +70C) Parameter "H" input voltage *1 "H" input voltage *2, *3, *4, *5, *6, *7 "L" input voltage *1 "L" input voltage *2, *3, *4, *5, *6, *7 "H" output voltage "H" output voltage "L" output voltage "L" output voltage *1, *4 VOH *2 *1, *4 VOL *2 Symbol VIH Condition -- Min. 0.44 VDD 0.80 VDD -0.3 VIL -- IO=-400 A IO=-2.0 mA IO=-200 A IO=-2.0 mA IO=3.2 mA IO=10.0 mA IO=1.6 mA IO=5.0 mA IIH/IIL ILO Rpull CI CO IREF VI=VDD/0 V VO=VDD/0 V VI= 0 V f=1 MHz, Ta=25C During A/D operation When A/D is stopped -0.3 VDD-0.4 VDD-0.6 VDD-0.4 VDD-0.6 -- -- -- -- -- -- -- -- 25 -- -- -- -- Typ. -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 50 5 7 -- -- Max. VDD+0.3 VDD+0.3 0.16 VDD 0.2 VDD -- -- -- -- 0.4 0.8 0.4 0.8 1/-1 1/-250 15/-15 10 100 -- -- 4 10 A k pF mA A A V Unit
Input leakage current*3, *6 Input current *5 Input current *7 output leakage current *1, *2, *4 Pull-up resistance Input capacitance Output capacitance Analog reference supply current
*1: *2: *3: *4:
Applicable to P0 Applicable to P1, P2, P4, P5, P6, P7, P8, P9, P10 Applicable to P12 Applicable to P3, P11
*5: *6: *7:
Applicable to RES Applicable to EA, NMI Applicable to OSC0
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Supply current (VDD=4.5 to 5.5 V) * MSM66573 (VDD=4.5 to 5.5 V, Ta=-30 to +70C)
Mode CPU operation mode HALT mode Symbol IDD IDDH Condition f=30 MHz, No Load f=32.768 kHz, No Load f=30 MHz, No Load XT is used* XT is not used* OSC is stopped, XT is not used VDD=2 V, Ta=25C* OSC is stopped Min. -- -- -- -- -- -- Typ. 36 60 23 5 1 0.2 Max. 55 160 35 110 100 10 A Unit mA A mA
STOP mode
IDDS
*: Ports used as inputs are at VDD or 0 V. Other ports are unloaded. * MSM66Q573 (VDD=4.5 to 5.5 V, Ta=-30 to +70C)
Mode CPU operation mode HALT mode Symbol IDD IDDH Condition f=30 MHz, No Load f=32.768 kHz, No Load f=30 MHz, No Load XT is used* XT is not used* OSC is stopped, XT is not used VDD=2 V, Ta=25C* OSC is stopped Min. -- -- -- -- -- -- Typ. 42 60 24 5 1 0.2 Max. 70 160 40 110 100 10 A Unit mA A mA
STOP mode
IDDS
*: Ports used as inputs are at VDD or 0 V. Other ports are unloaded. * MSM66P573 (VDD=4.5 to 5.5 V, Ta=-30 to +70C)
Mode CPU operation mode HALT mode Symbol IDD IDDH Condition f=24 MHz, No Load f=32.768 kHz, No Load f=24 MHz, No Load XT is used* XT is not used* OSC is stopped, XT is not used VDD=2 V, Ta=25C* OSC is stopped Min. -- -- -- -- -- -- Typ. 60 114 30 6 1 0.2 Max. 80 300 40 120 100 10 A Unit mA A mA
STOP mode
IDDS
*: Ports used as inputs are at VDD or 0 V. Other ports are unloaded.
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DC Characteristics 2 (VDD=2.4 to 3.6 V) MSM66573L/Q573L (VDD=2.4 to 3.6 V, Ta=-30 to +70C) MSM66P573 (VDD=2.7 to 3.6 V, Ta=-30 to +70C)
Parameter "H" input voltage *1 "H" input voltage *2, *3, *4, *5, *6, *7 "L" input voltage *1 "L" input voltage *2, *3, *4, *5, *6, *7 "H" output voltage "H" output voltage "L" output voltage "L" output voltage *1, *4 VOH *2 *1, *4 VOL *2 Symbol VIH Condition -- Min. 0.44VDD 0.80VDD -0.3 VIL -- IO=-400 A IO=-2.0 mA IO=-200 A IO=-1.0 mA IO=3.2 mA IO=5.0 mA IO=1.6 mA IO=2.5 mA IIH/IIL ILO Rpull CI CO IREF VI=VDD/0 V VO=VDD/0 V VI= 0 V f=1 MHz, Ta=25C During A/D operation When A/D is stopped -0.3 VDD-0.4 VDD-0.8 VDD-0.4 VDD-0.8 -- -- -- -- -- -- -- -- 40 -- -- -- -- Typ. -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 100 5 7 -- -- Max. VDD+0.3 VDD+0.3 0.16 VDD 0.2 VDD -- -- -- -- 0.5 0.9 0.5 0.9 1/-1 1/-250 15/-15 10 200 -- -- 2 5 A k pF mA A A V Unit
Input leakage current*3, *6 Input current *5 Input current *7 output leakage current *1, *2, *4 Pull-up resistance Input capacitance Output capacitance Analog reference supply current
*1: *2: *3: *4:
Applicable to P0 Applicable to P1, P2, P4, P5, P6, P7, P8, P9, P10 Applicable to P12 Applicable to P3, P11
*5: Applicable to RES *6: Applicable to EA, NMI *7: Applicable to OSC0
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Supply current (VDD=2.4 to 3.6 V) * MSM66573L (VDD=2.4 to 3.6 V, Ta=-30 to +70C)
Mode CPU operation mode HALT mode Symbol IDD IDDH Condition f=14 MHz, No Load f=32.768 kHz, No Load f=14 MHz, No Load XT is used* XT is not used* OSC is stopped, XT is not used VDD=2 V, Ta=25C* OSC is stopped Min. -- -- -- -- -- -- Typ. 12 30 7 2 1 0.2 Max. 20 130 11 110 100 10 A Unit mA A mA
STOP mode
IDDS
*: Ports used as inputs are at VDD or 0 V. Other ports are unloaded. * MSM66Q573L (VDD=2.4 to 3.6 V, Ta=-30 to +70C)
Mode CPU operation mode HALT mode Symbol IDD IDDH Condition f=14 MHz, No Load f=32.768 kHz, No Load f=14 MHz, No Load XT is used* XT is not used* OSC is stopped, XT is not used VDD=2 V, Ta=25C* OSC is stopped Min. -- -- -- -- -- -- Typ. 13 30 7 3 1 0.2 Max. 22 130 11 110 100 10 A Unit mA A mA
STOP mode
IDDS
*: Ports used as inputs are at VDD or 0 V. Other ports are unloaded. * MSM66P573 (VDD=2.7 to 3.6 V, Ta=-30 to +70C)
Mode CPU operation mode HALT mode Symbol IDD IDDH Condition f=12 MHz, No Load f=32.768 kHz, No Load f=12 MHz, No Load XT is used* XT is not used* OSC is stopped, XT is not used VDD=2 V, Ta=25C* OSC is stopped Min. -- -- -- -- -- -- Typ. 17 65 8 3 1 0.2 Max. 24 160 12 110 100 10 A Unit mA A mA
STOP mode
IDDS
*: Ports used as inputs are at VDD or 0 V. Other ports are unloaded.
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AC Characteristics 1 (VDD = 4.5 to 5.5 V) (1) External program memory control MSM66573/Q573/P573 (VDD=4.5 to 5.5 V, Ta=-30 to +70C)
Parameter Cycle time Clock pulse width (HIGH level) Clock pulse width (LOW level) PSEN pulse width PSEN pulse delay time Address setup time Address hold time Instruction setup time Instruction hold time Read data access time Symbol tcyc tWH tWL tPW tPD tAS tAH tIS tIH tACC CL=50 pF Condition fOSC=30 MHz Min. 33.3 13 13 2t-15 -- t-25 0 25
*1
Max. -- -- -- -- 45 -- -- -- -- 3t-65*2
Unit
ns
0 --
Note: t =tcyc/2 *1: MSM66P573=30 *2: MSM66P573=3t -70
tcyc CPUCLK tWH tWL
PSEN
tPD A0 to A19 tAS D0 to D7 tACC PC0 to 19
tPW
tAH INST0 to 7 tIS tIH
Bus timing during no wait cycle time
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PEDL66573-02
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MSM66573 Family
(2) External data memory control MSM66573/Q573/P573 (VDD=4.5 to 5.5 V, Ta=-30 to +70C)
Parameter Cycle time Clock pulse width (HIGH level) Clock pulse width (LOW level) RD pulse width WR pulse width RD pulse delay time WR pulse delay time Address setup time Address hold time Read data setup time Read data hold time Read data access time Write data setup time Write data hold time Symbol tcyc tWH tWL tRW tWW tRD tWD tAS tAH tRS tRH tACC tWS tWH CL=50 pF Condition fOSC=30 MHz Min. 33.3 13 13 2t-15 2t-15 -- -- t-25 t-3 25
*1
Max. -- -- -- -- -- 45 45 -- -- -- -- 3t-65*2 -- --
Unit
ns
0 -- 2t-30 t-3
Note: t =tcyc/2 *1: MSM66P573=30 *2: MSM66P573=3t -70
tcyc CPUCLK tWH tWL
RD
tRD A0 to A19 tAS D0 to D7 tACC WR tWD A0 to A19 tAS D0 to D7
tRW RAP0 to 19 tAH DIN0 to 7 tRS tRH
tWW RAP0 to 19 tAH DOUT0 to 7 tWS tWH
Bus timing during no wait cycle time
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PEDL66573-02
1 Semiconductor
MSM66573 Family
(3) Serial port control Master mode
MSM66573/Q573/P573 (VDD=4.5 to 5.5 V, Ta=-30 to +70C) Parameter Cycle time Serial clock cycle time Output data setup time Output data hold time Input data setup time Input data hold time Symbol tcyc tSCKC tSTMXS tSTMXH tSRMXS tSRMXH CL=50 pF Condition fOSC=30 MHz Min. 33.3 4tcyc 2t-5 5t-10 13 0 Max. -- -- -- -- -- -- Note: t=tcyc/2
tcyc CPUCLK
Unit
ns
TXC/ RXC tSCKC SDOUT (TXD) tSTMXH SDIN (RXD) tSRMXS tSRMXH tSTMXS
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PEDL66573-02
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MSM66573 Family
Slave mode MSM66573/Q573/P573 (VDD=4.5 to 5.5 V, Ta=-30 to +70C)
Parameter Cycle time Serial clock cycle time Output data setup time Output data hold time Input data setup time Input data hold time Symbol tcyc tSCKC tSTMXS tSTMXH tSRMXS tSRMXH CL=50 pF Condition fOSC=30 MHz Min. 33.3 4tcyc 2t-15 4t-10 13 3 Max. -- -- -- -- -- -- ns Unit
Note: t=tcyc/2
tcyc CPUCLK
TXC/ RXC tSCKC SDOUT (TXD) tSTMXH SDIN (RXD) tSRMXS tSRMXH tSTMXS
Measurement points for AC timing (except the serial port)
VDD 0V 2.0 V 0.8 V 2.0 V 0.8 V
Measurement points for AC timing (the serial port)
VDD 0V 0.8VDD 0.2VDD 0.8VDD 0.2VDD
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PEDL66573-02
1 Semiconductor
MSM66573 Family
AC Characteristics 2 (VDD = 2.4 to 3.6 V) (1) External program memory control MSM66573L/Q573L (VDD=2.4 to 3.6 V, Ta=-30 to +70C) MSM66P573 (VDD=2.7 to 3.6 V, Ta=-30 to +70C)
Parameter Cycle time Clock pulse width (HIGH level) Clock pulse width (LOW level) PSEN pulse width PSEN pulse delay time Address setup time Address hold time Instruction setup time Instruction hold time Read data access time Symbol tcyc tWH tWL tPW tPD tAS tAH tIS tIH tACC CL=50 pF Condition fOSC=14 MHz Min. 71.4 28 28 2t-25 -- t-40 -8*2 60 -8*2 --
*1
Max. -- -- -- -- 75 -- -- -- -- 3t-120
Unit
ns
Note: t =tcyc/2 *1: MSM66P573=2t -20 *2: MSM66P573=0
tcyc CPUCLK tWH tWL
PSEN
tPD A0 to A19 tAS D0 to D7 tACC PC0 to 19
tPW
tAH INST0 to 7 tIS tIH
Bus timing during no wait cycle time
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PEDL66573-02
1 Semiconductor
MSM66573 Family
(2) External data memory control MSM66573L/Q573L (VDD=2.4 to 3.6 V, Ta=-30 to +70C) MSM66P573 (VDD=2.7 to 3.6 V, Ta=-30 to +70C)
Parameter Cycle time Clock pulse width (HIGH level) Clock pulse width (LOW level) RD pulse width WR pulse width RD pulse delay time WR pulse delay time Address setup time Address hold time Read data setup time Read data hold time Read data access time Write data setup time Write data hold time Symbol tcyc tWH tWL tRW tWW tRD tWD tAS tAH tRS tRH tACC tWS tWH CL=50 pF Condition fOSC=14 MHz Min. 71.4 28 28 2t-25*1 2t-25 -- -- t-40 t-8*2 60 0 -- 2t-40 t-6
*1
Max. -- -- -- -- -- 75 75 -- -- -- -- 3t-120 -- --
Unit
ns
Note: t =tcyc/2 *1: MSM66P573=2t -20 *2: MSM66P573=t -6
tcyc CPUCLK tWH tWL
RD
tRD A0 to A19 tAS D0 to D7 tACC WR tWD A0 to A19 tAS D0 to D7
tRW RAP0 to 19 tAH DIN0 to 7 tRS tRH
tWW RAP0 to 19 tAH DOUT0 to 7 tWS tWH
Bus timing during no wait cycle time
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PEDL66573-02
1 Semiconductor
MSM66573 Family
(3) Serial port control Master mode MSM66573L/Q573L (VDD=2.4 to 3.6 V, Ta=-30 to +70C) MSM66P573 (VDD=2.7 to 3.6 V, Ta=-30 to +70C)
Parameter Cycle time Serial clock cycle time Output data setup time Output data hold time Input data setup time Input data hold time Symbol tcyc tSCKC tSTMXS tSTMXH tSRMXS tSRMXH CL=50 pF Condition fOSC=14 MHz Min. 71.4 4tcyc 2t-10 5t-20 21 0 Max. -- -- -- -- -- -- ns Unit
Note: t =tcyc/2
tcyc CPUCLK
TXC/ RXC tSCKC SDOUT (TXD) tSTMXH SDIN (RXD) tSRMXS tSRMXH tSTMXS
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PEDL66573-02
1 Semiconductor
MSM66573 Family
Slave mode MSM66573L/Q573L (VDD=2.4 to 3.6 V, Ta=-30 to +70C) MSM66P573 (VDD=2.7 to 3.6 V, Ta=-30 to +70C)
Parameter Cycle time Serial clock cycle time Output data setup time Output data hold time Input data setup time Input data hold time Symbol tcyc tSCKC tSTMXS tSTMXH tSRMXS tSRMXH CL=50 pF Condition fOSC=14 MHz Min. 71.4 4tcyc 2t-30 4t-20 21 7 Max. -- -- -- -- -- -- ns Unit
Note: t =tcyc/2
tcyc CPUCLK
TXC/ RXC tSCKC SDOUT (TXD) tSTMXH SDIN (RXD) tSRMXS tSRMXH tSTMXS
Measurement points for AC timing of MSM66573L/Q573L
VDD 0V 0.44VDD 0.16VDD 0.44VDD 0.16VDD
Measurement points for AC timing of MSM66P573 (except the serial port)
VDD 0V 2.0 V 0.8 V 2.0 V 0.8 V
Measurement points for AC timing (the serial port)
VDD 0V 0.8VDD 0.2VDD 0.8VDD 0.2VDD
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PEDL66573-02
1 Semiconductor
MSM66573 Family
A/D Converter Characteristics 1 (VDD=4.5 to 5.5 V) MSM6573/Q573/P573 (Ta=-30 to +70C, VDD=VREF=4.5 to 5.5 V, AGND=GND=0 V)
Parameter Resolution Linearity error Differential Linearity error Zero scale error Full-scale error Cross talk Conversion time Symbol n EL ED EZS EFS ECT tCONV Condition Refer to measurement circuit 1 Analog input source impedance RI5 k tCONV=10.7 s Refer to measurement circuit 2
Set according to ADTM set data
Min. -- -- -- -- -- -- 10.7
Typ. 10 -- -- -- -- -- --
Max. -- 3 2 +3 -3 1 --
Unit Bit
LSB
s/ch
A/D Converter Characteristics 2 (VDD=2.4 to 3.6 V)
MSM66573L/Q573L (Ta=-30 to +70C, VDD=VREF=2.4 to 3.6 V, AGND=GND=0 V) MSM66P573 (Ta=-30 to +70C, VDD=VREF=2.7 to 3.6 V, AGND=GND=0 V) Condition Min. Typ. Max. Unit Symbol n EL ED EZS EFS ECT tCONV Refer to measurement circuit 1 Analog input source impedance RI5 k tCONV=27.4 s Refer to measurement circuit 2
Set according to ADTM set data
Parameter Resolution Linearity error Differential Linearity error Zero scale error Full-scale error Cross talk Conversion time
-- -- -- -- -- -- 27.4
10 -- -- -- -- -- --
-- 4 3 +4 -4 2 --
Bit
LSB
s/ch
Reference voltage 0.1 F
- +
VREF 47 F +
VDD + 0.1 F GND 47 F
+5 V
RI AI0 to AI7 AGND CI
0V
Analog input
RI (impedance of analog input source) 5 k CI 0.1 F
Measurement Circuit 1
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PEDL66573-02
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MSM66573 Family
- +
5 k AI0 AI1 0.1 F to AI7
Analog input
Cross talk is the difference between the A/D conversion results when the same analog input is applied to AI0 through AI7 and the A/D conversion results of the circuit to the left.
VREF or AGND
Measurement Circuit 2 Definition of Terminology 1. Resolution Resolution is the value of minimum discernible analog input. With 10 bits, since 210 = 1024, resolution of (VREF - AGND) / 1024 is possible. 2. Linearity error Linearity error is the difference between ideal conversion characteristics and actual conversion c haracteristics of a 10-bit A/D converter (not including quantization error). Ideal conversion characteristics can be obtained by dividing the voltage between VREF and AGND into 1024 equal steps. 3. Differential linearity error Differential linearity error indicates the smoothness of conversion characteristics. Ideally, the range of analog input voltage that corresponds to 1 converted bit of digital output is 1LSB = (VREF - AGND) / 1024. Differential error is the difference between this ideal bit size and bit size of an arbitrary point in the conversion range. 4. Zero scale error Zero scale error is the difference between ideal conversion characteristics and actual conversion characteristics at the point where the digital output changes from 000H to 001H. 5. Full-scale error Full-scale error is the difference between ideal conversion characteristics and actual conversion characteristics at the point where the digital output changes from 3FEH to 3FFH.
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PEDL66573-02
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MSM66573 Family
PACKAGE DIMENSIONS
(Unit: mm)
TQFP100-P-1414-0.50-K
Mirror finish
Package material Lead frame material Pin treatment Package weight (g)
Epoxy resin 42 alloy Solder plating 0.55 TYP.
Solder plate thickness 5 m or more
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, TQFP, LQFP, SOJ, QFJ (PLCC), SHP, and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person on the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
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PEDL66573-02
1 Semiconductor
MSM66573 Family
(Unit: mm)
QFP100-P-1420-0.65-BK
Mirror finish
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 m or more 1.29 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, TQFP, LQFP, SOJ, QFJ (PLCC), SHP, and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person on the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
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PEDL66573-02
1 Semiconductor
MSM66573 Family
NOTICE 1. The information contained herein can change without notice owing to product and/or technical improvements. Before using the product, please make sure that the information being referred to is up-to-date. 2. The outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. When planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. When designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. Oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. Neither indemnity against nor license of a third party's industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. No responsibility is assumed by us for any infringement of a third party's right which may result from the use thereof. The products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). These products are not authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. Such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. Certain products in this document may need government approval before they can be exported to particular countries. The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. No part of the contents contained herein may be reprinted or reproduced without our prior permission. Copyright 1999 Oki Electric Industry Co., Ltd.
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